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Hardware Developer Analog/Mixed-Signal

Experienced Hardware Developer specializing in Analog/Mixed-Signal IC Design and verification. Expertise in the design of high-frequency clock signal generators and phas…

Usually within 24h (business days).
Anonymised profile – details after NDA/on request.
Hardware Developer Analog/Mixed-Signal

Executive snapshot

  • Experience: ca. 4 Jahre (davon ca. 2 Jahre in der Entwicklung)
  • Seniority: Junior
  • Work mode: Nach Absprache
  • Availability: Nach Absprache
  • Region: Paderborn
  • Focus: Electronics, Embedded Systems, Automotive, Industrial Electronics

At a glance

Profile ID
DP-319729
Role
Electronics Development Engineer, IC Designer, Circuit Developer
Seniority
Junior
Experience
ca. 4 Jahre (davon ca. 2 Jahre in der Entwicklung)
Work mode
Nach Absprache
Availability
Nach Absprache
Region
Paderborn
Languages
English: A1, German: A1
Engagement models
Festanstellung
Indicative rate
Nach Absprache

Short profile

Experienced Hardware Developer specializing in Analog/Mixed-Signal IC Design and verification. Expertise in the design of high-frequency clock signal generators and phase detectors, as well as transistor-level circuit development. Profound knowledge in simulation, layout, and post-layout verification of electronic systems. Practical experience in fault diagnosis and system analysis of hardware components.

Focus (domains)

ElectronicsEmbedded SystemsAutomotiveIndustrial ElectronicsEnergyIndustrialSoftwareEmbeddedTestingManagement

Core skills

Analog/Mixed-Signal IC DesignCircuit DesignTransistor-Level DesignSimulationVerification (DRCLVSRC ExtractionEM)PCB LayoutFault DiagnosisSystem AnalysisEmbeddedHardwareMATLABTestingVerificationValidationSoftwareManagementVectorCMicrosoft OfficeE-Mobility / Automotive / Industrial ElectronicsEmbedded Systems

Tools & technologies

Cadence VirtuosoIHP SG13G3CuMATLABVectorCMicrosoft OfficeEmbeddedHardwareTestingVerificationValidationSoftware

Track record & project highlights

Development of a quadrature clock generator for time-interleaved ADCs using Cadence Virtuoso and IHP SG13G3Cu 130 nm SiGe:C BICMOS technology, execution of transistor-level circuit design, simulation, and performance analysis for analog/mixed-signal circuits, pre-layout and post-layout verification including DRC, LVS, RC extraction, and EM simulations, design of a half-rate phase detector (30 Gb/s) and a charge pump in 45nm SOI CMOS, execution of schematic design, layout, and circuit verification (DRC, LVS, RC analysis), support in the development, testing, and validation of electronic circuits and PCB layouts.
Interested? We can share details quickly (NDA-ready) — just request the profile.